Quote:
Originally Posted by Penthode
Thanks for the reply. I won't deny that the FPGA is ideal for spatial/ temporal - rescaling/ interpolation. And certainly generating a composite signal may be straight forward. But what is your signal source?
The source of the signal I was considering would ideally come from a modern DVD player. The quality loss through analog to digital and digital to analog conversion is minimal if the video remains as component Y' Cb', Cr'. Analog component, serial digital (SMPTE259C) or HDMI, is okay. If the signal source is composite NTSC, the results will be compromised. Cascading composite codecs is lossy.
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Hi Terry,
Certainly obtaining the video directly from a digital source is preferable but not practical for this level of converters. In my professional design work, everything is SDI, quickly becoming 3G SDI but that is unheard of outside the broadcast industry. Consumer level HDMI is hampered by HDCP making it useless unless you want to try to obtain a license which would be cost prohibitive for these low volume converters.
For my low cost converters I use a video front end with a 4 line adaptive comb filter, so while not quite as good as component, it has proven to be more than adequate for the capabilities of these early sets. These parts have the capability to support S-Vid, so this input can be added to these converters. My broadcast WC converter has CVBS, S, and component YUV/RGB inputs but is overkill for this purpose. It uses 10 bit ADC/DAC's with 14 bit minimum internal processing which considerably raises the cost.
Quote:
Originally Posted by Penthode
Why I suggested that the FPGA may be over the top is that to actually generate a CPA signal from analog component video should only take a dozen or so discrete transistors. If rescaling and interpolation was necessary, I would not hesitate to say FPGA. But with 525 line 59.94Hz video in and out, I do not think an FPGA is necessary.
My curiosity is now raised and I will ponder a hardware based solution.
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I don't think it would be quite this easy in analog using baseband component. You need to generate the 3.8MHz carrier, preferably correctly locked to the Hsync (assuming the Hsync from the source is even stable enough although you could free run like consumer vcr's), bandwidth limit and quadrature modulate the R-Y and B-Y and then add back into Y. Potentially an off the shelf part might be able to do at least a portion of this, but it's still a fairly involved design.
The nice thing with an fpga design is you are not limited to the physical hardware. If you want to add a filter, change the carrier frequency or phase, etc. it's just a respin of the vhdl. I have added stuff to clients designs that were not even in the original spec all without touching the hardware.
Darryl